1. Field of the Invention
The present invention relates to a solid state image pickup device, more particularly to a metal oxide semiconductor (MOS) type solid state image pickup device and a method for manufacturing the same.
2. Description of Related Art
Recently, demand for a photoelectric conversion device has rapidly increased as an image pickup device of a two-dimensional image input device of a digital still camera and a video cam recorder primarily, or as a one-dimensional image reading device of a facsimile and a scanner primarily.
A charge-coupled device (CCD) and a MOS type sensor are used as the photoelectric conversion devices for these uses. A complementary metal oxide semiconductor (CMOS) photoelectric conversion device has been put to practical use as a representative of the MOS type photoelectric conversion devices. FIG. 14 is a general circuit configuration diagram of a pixel carrying a CMOS sensor. In FIG. 14, a reference numeral 1 designates a photodiode. A reference numeral 2 designates a transfer MOS transistor for transferring signal charges generated by the photodiode 1. A reference numeral 3 designates a floating diffusion region (hereinafter referred to as “floating diffusion”) for storing the transferred signal charges temporarily. A reference numeral 4 designates a resetting MOS transistor for resetting the floating diffusion 3 and the photodiode 1. A reference numeral 5 designates a selection MOS transistor for selecting an arbitrary row in an array. A reference numeral 6 designates a source follower MOS transistor for converting the signal charges of the floating diffusion 3 to a voltage to amplify the converted voltage by a source follower type amplifier. A reference numeral 7 designates a sense line, which is commonly used for one column to read pixel voltage signals. A reference numeral 8 designates a constant current source for flowing a constant current on the sense line 7.
It is needless to say that the present pixel circuit configuration can be applied to the present invention.
FIG. 15 is a schematic sectional view of a pixel carrying the conventional CMOS sensor. FIG. 15 especially shows a part composed of the photodiode 1 and the transfer MOS transistor 2 in FIG. 14. A reference numeral 11 designates an n type silicon substrate. A reference numeral 12 designates a P type well. A reference numeral 13a designates a gate oxide film of the MOS transistor 2. A reference numeral 13b designates a thin oxide film on a light receiving portion. A reference numeral 14 designates a gate electrode of the transfer MOS transistor 2. A reference numeral 15 designates an N type cathode of the photodiode 1. A reference numeral 16 designates a surface P type region for designing the photodiode 1 to have a buried structure. A reference numeral 17 designates a selection oxide film for isolating elements. A reference numeral 18 designates an N type high concentration region, which forms the floating diffusion 3 and is also the drain region of the transfer MOS transistor 2. A reference numeral 19 designates a silicon oxide film for insulating the gate electrode 14 from a metal first layer 21. A reference numeral 20 designates a contact plug. The reference numeral 21 designates the metal first layer. A reference numeral 22 designates an interlayer insulation film for insulating the metal first layer 21 from a metal second layer 23. The reference numeral 23 designates the metal second layer. A reference numeral 24 designates an interlayer insulation film for insulating the metal second layer 23 from a metal third layer 25. The reference numeral 25 designates the metal third layer. A reference numeral 26 designates a passivation film. In a color photoelectric conversion device, a not shown color filter layer, and further a not shown microlens for improving sensitivity are formed as upper layers of the passivation film 26. The light which has entered from the surface passes through an opening portion where the metal third layer 25 is not formed, and enters the photodiode. The light is absorbed in the N type cathode 15 or the P type well 12 to generate electron-hole pairs. Among them, the electrons are accumulated in the N type cathode 15.
Moreover, Japanese Patent Application Laid-Open No. 2000-12822 discloses a solid state image pickup device including a plurality of pixels formed in a semiconductor substrate. The pixels severally include a light receiving portion and a diffusion region, to which signal charges are transferred from the light receiving portion. In the solid state image pickup device, a reflection prevention film is formed above the semiconductor substrate with an insulation film interposed between the reflection prevention film and the semiconductor substrate in the light receiving portion. The reflection prevention film is formed so as to avoid at least a part above the diffusion region.
However, a part of the incident light does not enter the photodiode owing to the optical reflection on the interface between the surface P type region 16 and the thin oxide film 13b on the photodiode. The loss of the reflection can be expressed by the following formula.(Nsi(λ)−Nsio2(λ))2/(Nsi(λ)+Nsio2(λ))2  (1)where Nsi(λ) designates the refraction index of silicon at the wavelength λ; Nsio2(λ) designates the refraction index of a silicon oxide film at the wavelength λ.
As apparent from the formula (1), the larger the difference of refraction indices of adjoining two films is, the larger the ratio of reflection is. In the cross section structure shown in FIG. 15, all of the interlayer insulation films 19, 22, 24 and 26 are silicon oxide films. A flattened resin having a refraction index close to the refraction indices of the silicon oxide films is formed on the passivation film 26. Consequently, the maximum loss is generated on the interface between silicon (Nsi=4 to 5) and a silicon oxide film (Nsic2=1.4 to 1.5). In a CMOS type photoelectric conversion device, the surface of silicon of a photodiode adjoins a silicon oxide film, and consequently the lowering of the sensitivity of the photodiode has been produced.
Next, the reasons why noises are large will be described.
There are fixed pattern noises and random noises in the noise components to be generated in a CMOS type sensor. Hereupon, the random noises are noticed among them. Because the noise components to be generated in the source follower MOS transistor 6 among the random noise components have outputs in proportion to the 1/f of a drive frequency f of the MOS transistor 6, the noise components are called as 1/f noises. It is said that the 1/f noises are generated because carriers are randomly charged and discharged at a trap level of the interface between silicon and a silicon oxide film of a MOS transistor (see FIG. 16). FIG. 16 is a sectional view of a MOS transistor for illustrating the 1/f noises. FIG. 16 exemplifies an NMOS transistor. The NMOS transistor includes a gate electrode 35 above a P type substrate 31 with a gate oxide film 36 between, and an N+ type source 32 and a drain 33, both formed on the surface of the transistor. Because channel electrons 34 to flow by the application of a voltage between the gate electrode 35 and the drain 33 are influenced by the charging and the discharging of charges at a trap 37 of the gate oxide film 36, drain currents randomly fluctuate at every operation. The fluctuation is the cause of the 1/f noises. Moreover, because the largeness of the noises is in inverse proportion to the size of the MOS transistor, the finer a pixel is, the larger the noises are. Because the other random noises and fixed pattern noises have been lowered by the improvement of design such as contrivances of a circuit and a device, the 1/f noises has occupied a large portion in the whole random noise components.